Simulation of Decrease in Lag phenomena and Current Slump of Field-Plate GaAs FETs

K. Itagaki, H. Ueda, Y. Terao, K. Horio
Shibaura Institute of Technology, JP

Keywords: GaAs, FET, trap, current slump, drain lag, field plate

Abstract:

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed in which a deep donor “EL2” and a shallow acceptor are considered in a semi-insulating substrate, and the results are compared between the two cases with and without a field plate. It is shown that substrate-related drain lag is reduced by introducing a field plate because trapping effects become smaller. It is also shown that current slump and gate lag are also reduced in the field-plate structure. The dependence on field-plate length and SiO2 passivation layer thickness is also studied, suggesting that there are optimum values for these parameters to minimize the substrate-related current slump and also to maintain high frequency performance of GaAs MESFETs.