NSTI Nanotech 2009

HiSIM-SOI: SOI-MOSFET Model for Circuit Simulation Valid also for Device Optimization

N. Sadachika, S. Kusu, K. Ishimura, T. Murakami, T. Kajiwara, T. Hayashi, Y. Nishikawa, T. Yoshida, M. Miura-Mattausch
Hiroshima University, JP

Keywords: compact model, SOI-MOSFET, dynamic depletion, circuit simulation

Abstract:

SOI-MOSFETs are considered to be suitable for high performance as well as low power applications and its developments are tend to go toward the thinner SOI films to enhance the device characteristics. Thus compact models are required to cover all such wide range of device variation and to predict the device characteristics. In this work, the complete surface-potential-based SOI-MOSFET compact model HiSIM-SOI is presented. The developed model enables to predict device characteristics based on its structure for various SOI devices such as PD, FD and dynamically depleting device, which is called dynamic depletion and so on, solving the Poisson equation consistently. The basic approach is to solve the Poisson equation iteratively and three surface potential values are obtained consistently at the same time for given bias condition and device parameters and calculated potential values show good agreements with 2D-device simulation results for various device structures. The floating body effect which is one of the most serious parasitic effects in SOI-MOSFETs is also modeled in HiSIM-SOI. To capture the floating body effect, accumulated holes are included into the Poisson equation and solved consistently, showing good accuracy in the calculation results. The circuit performances are also compared for different geometries.
 
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