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Modeling of Floating-Body Devices Based on Complete Potential Description
N. Sadachika, T. Murakami, M. Ando, K. Ishimura, K. Ohyama, M. Miyake, H.J. Mattausch, M. Miura-Mattausch Hiroshima-University, JP
Keywords: floating-body, SOI, double-gate, MOSFET, modeling
Abstract: Advanced MOSFETs exploit the carrier confinement to suppress the short-channel effect, which is realized by reducing the bulk layer thickness. The ongoing developments of the multi-gate MOSFET as well as the fully-depleted SOI-MOSFET with ultra thin silicon layer are proved to be applicable beyond the 50nm technology node. However, these advanced devices suffer from the floating-body effect caused by an unfixed body node, which plays an important role for the device performances. Here we present a modeling approach, based on a consistent potential description, how to simplify the problem of solving the Poisson equation with the floating-body node. The solution to the charge storage within the substrate is also discussed.
Nanotech 2008 Conference Program Abstract
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