2008 NSTI Nanotechnology Conference and Trade Show - Nanotech 2008 - 11th Annual
Technical Conferences
Merck Corporate Needs
NanoInk Symposium
Nano Electronics & Photonics
Nano Fabrication
MEMS & NEMS
Sensors & Systems
Micro & Nano Fluidics
MSM - Modeling Microsystems
WCM - Compact Modeling
Nanostructured Materials & Devices
Soft Nanotechnologies & Applications
Nanoparticles in Soft Materials - Colloidal Systems
Polymer Nanotechnology
Carbon Nano Structures & Devices
Nano Particles & Applications
Composites
Nanostructured Surfaces and Interfaces
Nanoscale Characterization
Energy Technologies & Applications
Nanotech in Health, Environment & Society
ICCN - Nanoscale Modeling
Nanoreliability
Bio Nano Materials & Tissues
Bio Sensors & Diagnostics
Biomarkers & Nanoparticles
Cancer Diagnostics, Imaging & Treatment
Drug Delivery & Therapeutics
Nano Medicine
Nanotech to Neurology
Phage Nanobiotechnology
Clean Technology 2008
Industrial Impact Workshop
Confirmed Speakers
Program Committee
Reviewers

Partnering Events:

TechConnect Summit
Clean Technology 2008

2008 Workshop on

Compact Modeling

WCM 2008

in Association with

Eleventh International Conference on
Modeling and Simulation of Microsystems

MSM 2008

June 1-5, 2008
Hynes Convention Center
Boston, Massachusetts, U.S.A.

Workshop Chair

Xing Zhou Xing Zhou
Professor
Nanyang Technological University, Singapore

Symposium Sessions

 

Monday June 2

 

Tuesday June 3

8:30 WCM - 1: Bulk MOS models
10:30 WCM - 2: Noise/Statistical models
1:30 WCM - 3: Multiple-gate models
3:30 WCM - 4: Multiple-gate/DG models
7:30 WCM - Panel: Compact Models for Manufacturability - 7:30 - 9:00
 

Wednesday June 4

8:30 WCM - 5: Interconnect/interface/ESD models
10:30 WCM - 6: HBT/BiFET/HV models
1:30 WCM - 7: Diode/SOI/DG circuit models
3:30 WCM - 8: DG/FinFET models
 

Thursday June 5

 

Symposium Program

 

Tuesday June 3

Back to Top
8:30 WCM - 1: Bulk MOS modelsRoom 201
 Session chair: Christian Enz, Swiss Center for Electronics and Microtechnology, Switzerland
8:30 JUNCAP2 Express: an extremely efficient evaluation of the JUNCAP2 model
G.D.J. Smit, A.J. Scholten, D.B.M. Klaassen, NXP Semiconductors, NL
9:00 Modeling of gain in advanced CMOS technologies
A. Spessot, F. Gattel, P. Fantini, A. Marmiroli, STMicroelectronics, IT
9:20 Effective Drive Current in CMOS Inverters for Sub-45nm Technologies
J. Hu, J.E. Park, G. Freeman, H.S.P. Wong, Stanford University, US
9:40 Process Aware Compact Model Parameter Extraction for 45 nm Process
A.P. Karmarkar, V.K. Dasarapu, A.R. Saha, G. Braun, S. Krishnamurthy, X.-W. Lin, Synopsys (India) Pvt. Ltd., IN
Back to Top
10:30 WCM - 2: Noise/Statistical modelsRoom 201
 Session chair: Dirk Klaassen, NXP Semiconductors, NL
10:30 Compact Modeling of Noise in non-uniform channel MOSFET
A.S. Roy, C.C. Enz, T.C. Lim and F. Danneville, CSEM & EPFL, CH
11:00 An Iterative Approach to Characterize Various Advanced Non-Uniformly Doped Channel Profiles
R. Kaur, R. Chaujar, M. Saxena, R.S. Gupta, University of Delhi, IN
11:20 Modeling of Spatial Correlations in Process, Device, and Circuit Variations
N. Lu, IBM, US
11:40 Model Implementation for Accurate Variation Estimation of Analog Parameters in Advanced SOI Technologies
S. Suryagandh, N. Subba, V. Wason, P. Chiney, Z-Y Wu, B.Q. Chen, S. Krishnan, M. Rathor, A. Icel, Advanced Micro Devices, US
Back to Top
1:30 WCM - 3: Multiple-gate modelsRoom 201
 Session chair: Mitiko Miura-Mattausch, Hiroshima University, JP
1:30 Capacitance modeling of Short-Channel DG and GAA MOSFETs
H. Børli, S. Kolberg, T.A. Fjeldly, Norwegian University of Science and Technology, NO
2:00 New Properties and New Challenges in MOS Compact Modeling
X. Zhou, G.H. See, G. Zhu, Z. Zhu, S. Lin, C. Wei, A. Srinivas, J. Zhang, Nanyang Technological University, SG
2:20 Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Quantum-Mechanical Effects
G.H. See, X. Zhou, G. Zhu, Z. Zhu, S. Lin, C. Wei, J. Zhang, A. Srinivas, Nanyang Technological University, SG
2:40 Quasi-2D Surface-Potential Solution to Three-Terminal Undoped Symmetric Double-Gate Schottky-Barrier MOSFETs
G. Zhu, G.H. See, X. Zhou, Z. Zhu, S. Lin, C. Wei, J. Zhang, A. Srinivas, Nanyang Technological University, SG
Back to Top
3:30 WCM - 4: Multiple-gate/DG modelsRoom 201
 Session chair: Tor Fjeldly, Norwegian University of Science and Technology, NO
3:30 Construction of a Compact Modeling Platform and Its Application to the Development of Multi-Gate MOSFET Models for Circuit Simulation
M. Miura-Mattausch, M. Chan, J. He, H. Koike, H.J. Mattausch, T. Nakagawa, Y.J. Park, T. Tsutsumi, Z. Yu, Hiroshima University, JP
4:00 Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Any Body Doping
G.H. See, X. Zhou, G. Zhu, Z. Zhu, S. Lin, C. Wei, J. Zhang, A. Srinivas, Nanyang Technological University, SG
4:20 Surface Potential versus Voltage Equation from Accumulation to Strong Region for Undoped Symmetric Double-Gate MOSFETs and Its Continuous Solution
J. He, Y. Chen, B. Li, Y. Wei, M. Chan, PEKING University, CN
4:40 Modeling of Floating-Body Devices Based on Complete Potential Description
N. Sadachika, T. Murakami, M. Ando, K. Ishimura, K. Ohyama, M. Miyake, H.J. Mattausch, M. Miura-Mattausch, Hiroshima-University, JP
Back to Top
7:30 WCM - Panel: Compact Models for Manufacturability - 7:30 - 9:00Room 201
 Session chair: Josef Watts, IBM, US
- NVIDIA, B-K. Liew, US
- TSMC, A. Doganis, US
- H. Trombley, IBM, US
- S. Rochel, Blaze DFM, US
 

Wednesday June 4

Back to Top
8:30 WCM - 5: Interconnect/interface/ESD modelsRoom 201
 Session chair: Michael Schröter, University of Technology Dresden, DE
8:30 The Driftless Electromigration Theory (Diffusion-Generation-Recombination-Trapping)
C-T Sah, B.B. Jie, University of Florida, US
9:00 Adaptable Simulator-independent HiSIM2.4 Extractor
T. Gneiting, T. Eguchi, W. Grabinski, AdMOS GmbH Advanced Modeling Solutions, DE
9:20 Recent Advancements on ADMS Development
B. Gu, L. Lemaitre, Freescale Semiconductor, US
9:40 Source/Drain Junction Partition in MOS Snapback Modeling for ESD Simulation
Y. Zhou, J.-J. Hajjar, Analog Devices, Inc., US
Back to Top
10:30 WCM - 6: HBT/BiFET/HV modelsRoom 201
 Session chair: Xuemei Xi, Synopsys
10:30 Improved layout dependent modeling of the base resistance in advanced HBTs
S. Lehmann, M. Schroter, University of Technology Dresden, DE
11:00 The Bipolar Field-Effect Transistor Theory (A. Summary of Recent Progresses)
B.B. Jie, C-T Sah, Peking University, CN
11:20 The Bipolar Field-Effect Transistor Theory (B. Latest Advances)
C-T Sah, B.B. Jie, University of Florida, US
11:40 An Accurate and Versatile ED- and LD-MOS Model for High-Voltage CMOS IC Spice Simulation
B. Tudor, J.W. Wang, B.P. Hu, W. Liu, F. Lee, Synopsys, Inc., US
Back to Top
1:30 WCM - 7: Diode/SOI/DG circuit modelsRoom 201
 Session chair: Bin B. Jie, Peking University, CN
1:30 Modeling of PN Diode Based Phase-Change Memory Access Circuit
M. Chan, K. Lu, T.D. Happ, B. Rajendran, H-L Lung, C. Lam, HKUST, HK
2:00 Analytical Modelling and Performance Analysis of Double-Gate MOSFET-based Circuit Including Ballistic/quasi-ballistic Effects
S. Martinie, CEA LETI-MINATEC, FR
2:20 An Improved Impact Ionization Model for SOI Circuit Simulation
X. Xi, F. Li, B. Tudor, W. Wang, W. Liu, F. Lee, P. Wang, N. Subba, J-S Goo, Synopsys Inc, US
2:40 Parameter Extraction for Advanced MOSFET Model using Particle Swarm Optimization
R.A. Thakker, M.B. Patil, K.G. Anil, Indian Institute of Technology, IN
Back to Top
3:30 WCM - 8: DG/FinFET modelsRoom 201
 Session chair: Mansun Chan, Hong Kong University of Science and Technology, HK
3:30 Compact Models for Double Gate MOSFET with Quantum Mechanical Effects using Lambert Function
H. Abebe, H. Morris, E. Cumberbatch, V. Tyree, University of Southern California, ISI, US
3:50 Neural Computational Approach for FinFET Modeling and Nano-Circuit Simulation
M.S. Alam, A. Kranti, G.A. Armstrong, Z. H. College of Engineering & Technology, IN
4:10 Closed Form Current and Conductance Model for Symmetric Double-Gate MOSFETs using Field-dependent Mobility and Body Doping
V. Hariharan, R. Thakker, M.B. Patil, J. Vasi, V.R. Rao, IIT Bombay, IN
4:30 Comparison of Four-terminal DG MOSFET Compact Model with Thin Si channel FinFET Devices
T. Nakagawa, T. Sekigawa, T. Tsutsumi, Y. Liu, M. Hioki, S. O’uchi, H. Koike, Electroinformatics Group, JP
4:50 MOSFET Compact Modeling Issues for Low Temperature (77 K - 200 K) Operation
P. Martin, M. Cavelier, R. Fascio, G. Ghibaudo, CEA-LETI Minatec, FR
 

Top

Synopsis

Compact Models (CMs) for circuit simulation have been at the heart of CAD tools for circuit design over the past decades, and are playing an ever increasingly important role in the nanometer system-on-chip (SOC) era.  As the mainstream MOS technology is scaled into the nanometer regime, development of a truly physical and predictive compact model for circuit simulation that covers geometry, bias, temperature, DC, AC, RF, and noise characteristics becomes a major challenge.

Workshop on Compact Modeling (WCM) is one of the first of its kind in bringing people in the CM field together. The objective of WCM is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development and deployment, within the main theme - compact models for circuit simulation, which are largely categorized into the following groups:

  • Intrinsic Models
    • Bulk MOSFET
    • Multiple-Gate (MG-FET) - UTB-SOI/double-gate/tri-gate/GAA
    • High-Voltage/LDMOS
    • Schottky-Barrier/Si-nanowire (SB-FET/SiNW)
    • Bipolar/Junction (BJT/HBT/SiGe/JFET)
    • RF/noise
  • Extrinsic/Interconnect Models
    • Parasitic elements
    • Passive device
    • Diode
    • Resistor
    • ESD
    • Interconnect
  • Atomic/Quantum Models
    • Ballistic device
    • Carbon-Nanotube (CNFET)
  • Statistical Models
    • Statistical/process-based
    • Reliability/hot carrier
    • Numerical/TCAD/table-based
  • Model Extraction and Interface
    • Parameter extraction and optimization
    • Model-simulator interface
    • Model standardization

Top

Evening Panel

An evening Panel Discussion is planned for Tuesday, 7:30-9:00pm.

Topic:

Compact Models for Manufacturability

Whatever your design goals, to achieve them in silicon you must account for manufacturing variation in your design. A typical foundry collects a huge amount of information on process variation. But this information is not available to the circuit designer in a form that can be used to make design decisions.

Compact models have traditionally come with fixed corner files which are useful predicting best and worst case delays of static CMOS logic but not appropriate for other types of circuits or other circuit characteristics. Each member of the Panel will address two board questions from the perspective of their own experience.

  • What information does the circuit designer need to know in order to design products which meet their design goals across the whole process window.
  • How can this information be delivered to and used by the circuit designer.
Moderator: Josef Watts
, IBM, USA
Panelists: Boon-Khim Liew, NVIDIA
Akis Doganis, TSMC
Henry Trombley, IBM
Steffen Rochel, DFM

Top

Workshop Program

WCM2008 Program will be posted below and at the following web:

www.nsti.org/Nanotech2008/WCM2008/

Top

Contributed Papers

Contributed papers in the scope of “compact models for circuit simulation” are solicited. Limited papers will be selected for Oral presentations and the remaining accepted papers will be planned for Poster presentations. This year, there will be NO Oral Briefings of the poster papers.

All contributed papers will go through Nanoch/WCM review. Please follow Nanotech paper submission guidelines at the following website:

www.nsti.org/Nanotech2008/WCM2008/

Top

Top

Presentation Slides

Contributed presentation slides. (Click on each  to download the PDF file.  © Copyright of the PDF files belongs to the respective contributors.  Last update: Sept. 17, 2008.)
Download and save ... Download and save the entire ZIP file of presentation slides (12MB)
Workshop Program
D. B. M. Klaassen, JUNCAP2 Express: an extremely efficient evaluation of the JUNCAP2 model
V. K. Dasarapu, Process Aware Compact Model Parameter Extraction for 45 nm Process
C. Enz, Compact Modeling of Noise in non-uniform channel MOSFET
N. Lu, Modeling of Spatial Correlations in Process, Device, and Circuit Variations
T. Fjeldly, Capacitance modeling of Short-Channel DG and GAA MOSFETs
X. Zhou, New Properties and New Challenges in MOS Compact Modeling
G. J. Zhu, Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Quantum- Mechanical Effects
G. J. Zhu, Quasi-2D Surface-Potential Solution to Three-Terminal Undoped Symmetric Double-Gate Schottky-Barrier MOSFETs
M. Mirua-Mattausch, Construction of a Compact Modeling Platform and Its Application to the Development of Multi-Gate MOSFET Models for Circuit Simulation
G. J. Zhu, Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Any Body Doping
M. Chan, Surface Potential versus Voltage Equation from Accumulation to Strong Region for Undoped Symmetric Double-Gate MOSFETs and Its Continuous Solution
T. Gneiting, Adaptable Simulator-independent HiSIM2.4 Extractor
Y. Zhou, Source/Drain Junction Partition in MOS Snapback Modeling for ESD Simulation
M. Schroter, Improved layout dependent modeling of the base resistance in advanced HBTs
B. Tudor, An Accurate and Versatile ED- and LD-MOS Model for High-Voltage CMOS IC Spice Simulation
S. Martinie, Analytical Modelling and Performance Analysis of Double-Gate MOSFET-based Circuit Including Ballistic/quasi-ballistic Effects
H. Abebe, Compact Models for Double Gate MOSFET with Quantum Mechanical Effects using Lambert Function
T. Nakagawa, Comparison of Four-terminal DG MOSFET Compact Model with Thin Si channel FinFET Devices
P. Martin, MOSFET Compact Modeling Issues for Low Temperature (77 K - 200 K) Operation

Top

Web sites for Proceedings

Nanotech 2008, Volume 3, Chapter 7

Top

Web Site Archive

Top