2007 NSTI Nanotechnology Conference and Trade Show - Nanotech 2007 - 10th Annual

The Innitial Reverse-Bias Injecting P+-N Junction Mode in P+-N-P+- Structures with Punch-Through

I. Mats
Diatex, Selected Texno-Fix, CA

Keywords:
bipolar transistors, current leakage, design, FETs, punchthrough, shape, space charge, space charge limited conduction

Abstract:
The Volt-Ampere Characteristics (VAC)s of P+NP+-structures in the schemes with floating base and short-cut p+-n junction (emitter) in punch-through modes were calculated before. It is important to research a behavior for similar structures but with initial reverse-bias (Uer) injecting p+-n -junction. Calculation and experimental characteristics VACs for lateral and vertical devices has good consultation. P+NP+ (N+PN+) – Devices in this mode can be used in variety Field-Effect Transistors including four terminals, DEPFETs, Punchthrough FETs, Bipolar transistors, Protection elements, Electrostatic dischargers, Charge coupled and photo punch-through devices, Reference sources, and Amplifiers.

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