2007 NSTI Nanotechnology Conference and Trade Show - Nanotech 2007 - 10th Annual

Hybridization of CMOS with CNT-based Complementary Nano Electro-Mechanical Switch for Low-Leakage and Robust Embedded Memory Design

R.S. Chakraborty, S. Narasimhan and S. Bhunia
Case Western Reserve University, US

Keywords:
CNEMS, hybridization, leakage power, robust embedded memory design, bitline leakage

Abstract:
Embedded static random access memory (SRAM) that constitutes an integral part of nanoelectronic systems, experiences two major challenges with aggressive technology scaling: 1) exponential increase in leakage current [1] and 2) decrease in robustness of read/write/hold operation [1]. We propose, for the first time, integration of carbon nanotube (CNT) based nano electro-mechanical switches (NEMS) with CMOS-based SRAM to achieve significant improvement in: 1) leakage power in standby mode (~19X compared to the best existing technique) and 2) robustness of read/write operation due to bitline leakage reduction (~55X).

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