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FPGA-based Neutron Radiation Tolerant Microcontroller

D. Makowski, G. Jablonski, M. Grecki, J. Mielczarek and A. Napieralski
Technical University of Lodz, PL

Keywords:
single event effect, single event upset, field programmable logic device, static, radiation tolerance, random access memory

Abstract:
The paper presents a FPGA-based neutron radiation detector using radiation sensitive SRAM as a detector. Its main component is a PIC16C57-compatible microcontroller, described in VHDL. The system has been designed using hardware redundancy, Hamming error correction codes and memory scrubbing techniques. It is equipped with an UART, controlling the fiber-optics link or electrical link in EIA-485 or RS-232 standard. In addition, a fast CRC32 co-processor has been implemented in FPGA fabric to calculate the 32-bit Cyclic Redundancy Check (CRC32) code and secure each block of data send via UART interface. To enable observability of SEUs in the MCU a supplementary monitor was also embedded.
Conventional synthesis tools offered by ACTEL were applied to design the neutron radiation tolerant microcontroller. However additional steps must be added to implement redundancy and other techniques. The comparison of the classical and SEU tolerant designing process is depicted in Figure 1 (detailed description of design methodology will be described in the final paper). The presented method can be applied to any FPGA device. Moreover, one can apply the design process to create ASIC structure using VHDL and produce radiation tolerant integrated circuit.
Hamming codes secure the following modules of the microcontroller: Program Memory, Register File, Stack, UART transmitter and receiver FIFOs

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