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Emerging Nanoelectronic Devices and their Benchmarking Methodology

Robert Chau

Intel Fellow and Director of Transistor Research, Intel Corporation, US

Robert S. Chau is an Intel Fellow and director of transistor research and nanotechnology. He is responsible for directing research and development in advanced transistors and gate dielectrics for microprocessor applications. He is also responsible for leading research efforts in advanced nanotechnology for future device and process applications.

Chau joined Intel in 1989 and developed seven generations of Intel gate oxides along with many transistor innovations used in various Intel logic processes and products. He also introduced many new process modules and electrical test capability for Intel’s future logic processes. Chau was promoted in December 2000 to the rank of Intel Fellow, the company’s highest and most prestigious technical position.

Chau currently manages the Novel Device Laboratory and leads a research team focusing on new transistor architectures, process modules and technologies, and characterization techniques for the 32nm and 22m logic technology nodes and beyond. He is responsible for the research and development of alternative gate dielectric and advanced silicon and non-silicon nanotechnology.

Chau frequently presents technical papers in international technical conferences and workshops, serves as a panelist on international technical panels, and gives technical seminars and lectures to universities.

Chau received his bachelor’s and master’s degrees and Ph.D. in electrical engineering from The Ohio State University. He holds 52 United States patents in device and process technologies and has received six Intel Achievement Awards and 13 Intel Logic Technology Development Division Recognition Awards for his outstanding technical achievements in gate oxide, transistor and process module research and development. Chau has received the 2003 Alumni Professional Achievement Award from The Ohio State University Alumni Association.

Chau has been elected an IEEE Fellow for contributions to the research and development of gate dielectric and transistor technologies for microprocessors.

 
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