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The Emerging Role of Nanocrystalline Ceria in Microelectronic Polishing Applications

P.G. Murray and D.C. Coy
Nanophase Technologies Corporation, US

Keywords:
nanoparticle, polishing, defectivity, planarity

Abstract:
State of the art microelctronics have 90-nm feature sizes today. By 2010 the Roadmap requirements will be 32-nm feature sizes. Not only will feature size continue to decrease dramatically placing stringent new performance specifications on laser lenses, lithography optics, and photomask blanks, but the specifications are becoming increasing demanding for chip planarity and defectivity in the CMP area as well. As a result, every glass surface that the laser light contacts en route to generating a circuit image, as well as the the wafer itself, must be polished to higher tolerances. A new polishing nanoparticle, with complementary dispersion technology, is required to address these needs. The requirements not only include smaller particles, discrete non-friable particles, more active particles, and tighter particle size distributions, but also improved product consistency and high purity. Nanocrystalline ceria and alumina manufactured by Nanophase Technologies Corporation’s unique NanoArc™ synthesis have attributes which enable new performance benchmarks to be realized in demanding semiconductor/glass polishing applications. This NanoArc™ process is based on an “active plasma” technology and produces nanoparticle surfaces engineered to have high zeta potentials when dispersed in water. This enables the particles to be dispersed as primary crystallites and permits stable dispersions to be commercially manufactured. The particle size distribution may then be tailored to achieve a specific polishing performance requirement and useful process additives such as lubricants, dispersants and pH buffers may be added. The NanoArc™ process will be described. Commercially available ceria (Figure 1) and alumina dispersions from the process will be described with specific attention given to differentiating characteristics which enable polishing applications with the following performances benchmarks: laser lenses super-polished to one Å or less, photomask micro-roughness of 0.278 nm [ 2mm x 2mm], wafer stepper homogeneous roughness < 2 Å RMS, and single digit defect levels on 200-mm semiconductor wafers.

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