Compact Modeling of Four-Terminal Junction Field-Effect Transistors
University of Central Florida, US
four-terminal junction field-effect transistors, modeling, JFET compact model
This paper presents a physics -based compact model for a four terminal (independent top and bottom gates) junction field-effect transistor (JFET). The model describes the JFET’s dc and ac characteristics with a high degree of accuracy and continuity. Temperature effect is also accounted for, and the model is applicable for a wide range of operating temperatures.
Back to Program
Nanotech 2005 Conference Program Abstract