Improved Compact Model for Four-Terminal DG MOSFETs
T. Nakagawa, T. Sekigawa, T. Tsutsumi, M. Hioki, E. Suzuki and H. Koike
National Institute of Advanced Industrial Science and Technology, JP
Keywords: compact model, double gate, FET, charge-sheet model
Double-gate field-effect transistors are promising device structures which have excellent scalability. To evaluate merits of DG MODFETs, we developed a compact four-terminal DG MOSFET model by adopting the double charge-sheet model. In this presentation, we report the improvement of the model to make it more accurate for wider range of device dimensions and device operation conditions. Calculation of the carrier density at the source-end, is quite sensitive to the surface potential values. This causes very large or infinite iteration in Newton_ method when the Si-channel is thick. To alleviate this problem, we tuned the algorithm robust and fast. Inappropriate data transfer to the transport equation from the carrier-density calculation causes current anomaly in the subthreshold region. To resolve this problem we found that we have to abandon the surface potential accuracy at the source-end to keep the charge density accuracy. Conventional charge-sheet model leads to thin carrier density with unphysically high carrier velocity at the drain-end. This is problematic in short-channel device, since the velocity saturation cannot be handled properly. In this poster presentation, we will address these issues on the compact model design for the four-terminal DG MOSFETs.
Nanotech 2004 Conference Technical Program Abstract