A Physical Compact MOSFET Mobility Model Including Accurate Calculation of Saturation Surface Potential.
J. Benson, N. V. D’Halleweyn, K. Mistry, W. Redman-White
University of Southampton, UK
Keywords: Process, Device and Circuit Simulation
This paper describes a MOSFET vertical mobility model that has been implemented in a surface potential based compact model . The main scattering mechanisms (surface roughness, phonon, and Coulomb) are accounted for using an expression of the form:
The surface potential dependence of each scattering term has been studied extensively in previous work [2,3]. While a number of compact models use a vertical mobility expression of this form [4,5], problems can arise when calculating the saturation surface potential at the drain, ysLsat. Usually, ysLsat is calculated as the solution of a quadratic equation; this is achieved either by simplifying the denominator in (1), or else ignoring the effects of the vertical field on ysLsat. Either approach introduces an error when determining the transition point between triode and saturation.
In this work, all scattering terms have been retained when calculating the saturation surface potential. Using the exact form of (1) yields a quartic expression in ysLsat. Taking the exact quartic solution results in numerical instabilities in ysLsat under some conditions (Figure 1), which cannot be corrected using numerical limiting. Instead, a method has been devised in which the quartic is approximated by a stable quadratic expression. The accuracy of the approximate solution is very high; deviation from the exact solution is typically a few mV at most, but this worst case usually only occurs for excessive gate voltages (Figure 2).
The physical nature of the model allows close fitting to experimental data with minimal optimisation of model parameters (Figures 3-6). Good matching is achieved using a single parameter set, for a full range of channel lengths. The new model demonstrates a useful technique for ensuring accurate, numerically stable solutions to high-order polynomial expressions. The solution is closed-form, making it suitable for circuit simulation. Although the new mobility model has been tested for PD-SOI MOSFETs, it can be applied with equal validity to bulk devices.
NSTI Nanotech 2003 Conference Technical Program Abstract