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Workshop on Compact Modeling

Workshop on Compact Modeling

Fifth International Conference on
Modeling and Simulation of Microsystems

April 22-25, 2002
San Juan Marriott Resort & Stellaris Casino
San Juan, Puerto Rico, U.S.A.

Synopsis | Invitees | Program | Panel | Tutorial | Slides | Website | Album
Synopsis As the mainstream MOS technology is scaled into the very-deep-submicron (VDSM) era, development of a truly physical and predictive MOSFET compact model (CM) for circuit simulation that covers geometry, bias, temperature, DC, AC, RF, and noise characteristics becomes a major challenge.  There exist a large number of CM development efforts that address the new challenges in theoretical models as well as industrial applications.  It would be beneficial to bring together researchers and CM developers to share their ideas and insights on the current needs and future trends in CM development in the context of VDSM technology and circuit as well as system-on-chip (SOC) design.

Workshop on Compact Modeling (WCM) is one of the first of its kind in bringing people in the CM field together.  The objective is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers and circuit designers.  It consists of a 2 day Invited-Speaker Session, an Evening Panel Session, and a Tutorial Session.  Regular papers are also solicited to follow the above sessions in the Contributed-Paper Session.  The topics are centered at bulk-Si and SOI MOSFET compact models for circuit simulation to address the following issues:

  • Physics-based I-V model formulations
  • Scalable AC/RF/noise models
  • Predictive models with process correlation
  • Statistical modeling with compact models
  • Compact model with higher-order (atomic-level) effects
  • Parameter extraction
  • Global vs local optimization
  • Equivalent circuit generation from numerical simulation
  • Compact solution from surface-potential-based models
  • Benckmark tests and model comparisons
  • Compact models for SOI MOSFETs
  • Interconnect modeling in CMOS technology
  • Role of CM in bridging technology development, TCAD, and circuit design
  • Trends and needs in compact models in the VDSM era
Created and maintained by Prof. Xing Zhou, Nanyang Technological University, Singapore, EXZHOU@ntu.edu.sg
Invited Speakers There are 23 invited speakers from all over the world (10 countries) to present their work and their views on compact modeling.  They are listed below:
  • Narain Arora, Simplex Solutions, USA
  • Peter Bendix, LSI Logic, USA
  • Britt Brooks, Texas Instruments, USA
  • Matthias Bucher, National Technical University of Athens, Greece
  • Mansun Chan, Hong Kong University of Science and Technology, Hong Kong
  • Jamal Deen, McMaster University, Canada
  • Michael Duane, Applied Materials, USA
  • Christian Enz, Swiss Center for Electronics and Microtechnology, Switzerland
  • Jerry Fossum, University of Florida, USA
  • Daniel Foty, Gilgamesh Associates, USA
  • Samuel Fung, IBM, USA
  • Gennady Gildenblat, Pennsylvania State University, USA
  • Dirk Klaassen, Philips Research Laboratories, The Netherlands
  • Kwyro Lee, Korea Advanced Institute of Science and Technology, Korea
  • Serge Luryi, State University of New York at Stony Brook, USA
  • Marco Mastrapasqua, Agere Systems, USA
  • Colin McAndrew, Motorola, USA
  • Mitiko Miura-Mattausch, Hiroshima University, Japan
  • Andrea Pacelli, State University of New York at Stony Brook, USA
  • Roberto Suaya, Mentor Graphics, France
  • Josef Watts, IBM, USA
  • Xisheng Zhang, Celestry Design Technologies, USA
  • Xing Zhou, Nanyang Technological University, Singapore
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Workshop Program WCM-1: Tuesday, April 23, 10:30 - 12:00
Session chair: Xing Zhou, Nanyang Technological University, Singapore WCM-2: Tuesday, April 23, 14:00 - 15:30
Session chair: Jerry Fossum, University of Florida, USA WCM-3: Tuesday, April 23, 16:00 - 18:00
Session chair: Serge Luryi, State University of New York at Stony Brook, USA WCM-4: Wednesday, April 24, 8:30 - 10:00
Session chair: Narain Arora, Simplex Solutions, USA WCM-5: Wednesday, April 24, 10:30 - 12:00
Session chair: Christian Enz, CSEM SA, Switzerland WCM-6: Wednesday, April 24, 14:00 - 15:30
Session chair: Jamal Deen, McMaster University, Canada WCM-7: Wednesday, April 24, 15:40 - 17:40
Session chair: Dirk Klaassen, Philips Research Laboratories, The Netherlands WCM-8: Thursday, April 25, 9:30 - 11:00
Session chair: Albert Kordesch, Silterra Malaysia
Evening Panel
Session
Trends and Needs in Compact Models in the SOC Era
Tuesday, April 23, 19:00 - 21:00
Moderator
Narain Arora, Simplex Solutions, USA
Panelist
  • Peter Bendix, LSI Logic, USA
  • Britt Brooks, Texas Instruments, USA
  • Mansun Chan, Hong Kong University of Science and Technology, Hong Kong
  • Christian Enz, Swiss Center for Electronics and Microtechnology, Switzerland
  • Daniel Foty, Gilgamesh Associates, USA
  • Gennady Gildenblat, Pennsylvania State University, USA
  • Dirk Klaassen, Philips Research Laboratories, The Netherlands
  • Mitiko Miura-Mattausch, Hiroshima University, Japan
 
Agenda
A) 19:00 - 19:45:
5-min presentation for each panelist for the individual personal views on the topic: "Trends and Needs in Compact Models in the SOC Era"

B) 19:45 - 20:30:
Panel discussion on the selected 8 topics (average ~10min/topic).  Panelists are to provide their views on the pros and cons, supporting or opposing arguments for the following topic categories:

  1. Compact model standardization vs. diversity
  2. Compact model quality: definitions and priorities
  3. Compact model applications in circuit design and technology development
  4. Compact model parameter extraction vs. optimization
  5. Compact model predictability and scalability
  6. RF/parasitic/interconnect models vs. intrinsic transistor compact models
  7. Compact model accuracy and efficiency tradeoff
  8. Physically based vs. largely empirical compact models
C) 20:30 - 21:00:
Q/A session for the audience
Tutorial Session Thursday, April 25, 11:00 - 18:15
Five tutorials are offered by the invitees on special topics, which are arranged in series with the Invited-Speaker Session for the general audience.
Presentation Slides (Click on each  to download the PDF file.  © Copyright of the PDF files belongs to the respective contributors.)
View SlidesNarain Arora, Challenges of Modeling VLSI Interconnects in the DSM Era
View SlidesPeter Bendix, Detailed Comparison of the SP, EKV, and BSIM3 Models
View SlidesMansun Chan, Engineering BSIM for the Nano-Technology Era and Beyond
View SlidesJamal Deen, RF MOS Noise Parameter Extraction and Modeling
View SlidesMichael Duane, The Role of TCAD in Compact Modeling
View SlidesChristian Enz, The Foundations of the EKV MOS Transistor Charge-Based Model
View SlidesJerry Fossum, A Unified Process-Based Compact Model for Scaled PD/SOI and Bulk-Si MOSFETs
View SlidesSamuel Fung, Present Status and Future Direction of BSIM SOI Model for High-Performance/Low-Power/RF Application
View SlidesGennady Gildenblat, Advanced Surface-Potential-Based Model (SP)0
View SlidesDirk Klaassen, RF Applications of MOS Model 11
View SlidesKwyro Lee, RF CMOS Modeling and Parameter Extraction Approaches Taking Charge Conservation into Account
View SlidesSerge Luryi, Automatic Generation of RF Compact Models from Device Simulation - Part I: Motivation and methodology
View SlidesColin McAndrew, Unified Statistical Modeling for Circuit Simulation
View SlidesMitiko Miura-Mattausch, HiSIM: Self-Consistent Surface-Potential MOS-Model Valid Down to Sub-100nm Technologies
View SlidesAndrea Pacelli, Automatic Generation of RF Compact Models from Device Simulation - Part II: Implementation and applications
View SlidesJosef Watts, How to Build an SOI MOSFET Compact Model without Violating the Laws of Physics
View SlidesXing Zhou, Xsim: A Compact Model for Bridging Technology Developers and Circuit Designers

View SlidesS. B. Chiah, Physically-Based Approach to Deep-Submicron MOSFET Compact Model Parameter Extraction
View SlidesD. V. Kumar, Simulation Study of Non-Quasi Static Behaviour of MOS Transistors
View SlidesL. Larcher, A New Analytical Model of Channel Hot Electron (CHE) and CHannel Initiated Secondary ELectron (CHISEL) Current Suitable for Compact Modeling
View SlidesK. Y. Lim, Compact Model for Manufacturing Design and Fluctuation Study

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Closing Remark Thursday, April 25, 18:15 - 18:30
View SlidesXing Zhou, Nanyang Technological University, Singapore top
Websites for Proceedings http://nsti.org/procs/MSM2002/13

Download PDFClick to download the program (PDF)

 
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